View MAX6955ATL_8396571.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan evaluation kit available general description the max6955 is a compact display driver that interfaces microprocessors to a mix of 7-segment, 14-segment, and 16-segment led displays through an i 2 c-compati- ble 2-wire serial interface. the max6955 drives up to 16 digits 7-segment, 8 digits 14-segment, 8 digits 16-seg- ment, or 128 discrete leds, while functioning from a supply voltage as low as 2.7v. the driver includes five i/o expander or general-purpose i/o (gpio) lines, some or all of which can be configured as a key-switch reader. the key-switch reader automatically scans and debounces a matrix of up to 32 switches. included on chip are full 14- and 16-segment ascii 104-character fonts, a hexadecimal font for 7-segment displays, multiplex scan circuitry, anode and cathode drivers, and static ram that stores each digit. the max- imum segment current for the display digits is set using a single external resistor. digit intensity can be inde- pendently adjusted using the 16-step internal digital brightness control. the max6955 includes a low-power shutdown mode, a scan-limit register that allows the user to display from 1 to 16 digits, segment blinking (synchronized across multiple drivers, if desired), and a test mode, which forces all leds on. the led drivers are slew-rate limited to reduce emi. for an spi-compatible version, refer to the max6954 data sheet. an evaluation kit (ev kit) for the max6955 is available. applications set-top boxes bar graph displays panel meters audio/video equipment white goods benefits and features simplifies driving 5 x 7 matrix led displays ? drives common-cathode monocolor and bicolor led displays ? drives up to 16 digits 7-segment, 8 digits 14-segment, 8 digits 16-segment, 128 discrete leds, or a combination of digit types ? 2.7v to 5.5v operation standard 2-wire interface supports a variety of microprocessor architectures ? 400kbps 2-wire i 2 c-compatible interface integrated flexibility supports different application requirements ? built-in ascii 104-character font for 14-segment and 16-segment digits and hexadecimal font for 7-segment digits ? 16-step digit-by-digit digital brightness control ? display blanked on power-up ? automatic blinking control for each segment ? 10a (typ) low-power shutdown (data retained) five gpio port pins can be configured as key-switch reader to scan and debounce up to 32 switches with n-key rollover ? irq output when a key input is debounced slew-rate-limited segment drivers for lower emi 36-pin ssop and 40-pin dip and tqfn packages automotive temperature range standard covers usage in harsh environments ordering information part temp range pin-package max6955aax+ -40c to +125c 36 ssop MAX6955ATL+ -40c to +125c 40 tqfn-ep* pin configurations and typical operating circuits appear at end of data sheet. iset osc osc_out blink scl ad0 ad1 sda 2-wire serial interface ram blink control configuration register character generator rom current source divider/ counter network digit multiplexer pwm brightness control gpio and key-scan control led drivers o0 to o18 p0 to p4/irq max6955 functional diagram * ep = exposed pad. + denotes a lead(pb)-free/rohs-compliant package. 19-2548; rev 4; 7/15
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 2 www.maximintegrated.com absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. voltage (with respect to gnd) v+ .........................................................................-0.3v to +6v scl, sda, ad0, ad1 ...........................................-0.3v to +6v all other pins............................................-0.3v to (v+ + 0.3v) current o0?7 sink current ......................................................935ma o0?18 source current .................................................55ma scl, sda, ad0, ad1, blink, osc, osc_out, iset ....20ma p0, p1, p2, p3, p4/ irq ....................................................40ma gnd .....................................................................................1a continuous power dissipation (t a = +70?) 36-pin ssop (derate at 11.8mw/? above +70?) .....941mw 40-pin tqfn (derate at 25.6mw/? above +70?)....2051.3mw operating temperature range (t min to t max ) ...............................................-40? to +125? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? dc electrical characteristics (typical operating circuit, v+ = 2.7v to 5.5v, t a = t min to t max , unless otherwise noted.) (note 1) parameter s ymbol condition s min typ max unit s operating supply voltage v+ 2.7 5.5 v t a = +25? 10 35 shutdown supply current i shdn shutdown mode, all digital inputs at v+ or gnd t a = t min to t max 40 ? t a = +25? 22 30 operating supply current i+ all segments on, all digits scanned, intensity set to full, internal oscillator, no display or osc_out load connected t a = t min to t max 35 ma osc = rc oscillator, r set = 56k ? , c set = 22pf, v+ = 3.3v 4 master clock frequency f osc osc driven externally 1 8 mhz dead clock protection frequency f osc 95 khz osc internal/external detection threshold v osc 1.7 v osc high time t ch 50 ns osc low time t cl 50 ns slow segment blink period f slowblink osc = rc oscillator, r set = 56k ? , c set = 22pf, v+ = 3.3v 1s fast segment blink period f fastblink osc = rc oscillator, r set = 56k ? , c set = 22pf, v+ = 3.3v 0.5 s fast or slow segment blink duty cycle 49.5 50.5 %
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 3 www.maximintegrated.com dc electrical characteristics (continued) (typical operating circuit, v+ = 2.7v to 5.5v, t a = t min to t max , unless otherwise noted.) (note 1) parameter s ymbol condition s min typ max unit s v led = 2.2v, v+ = 3.3v segment drive source current i seg v led = 2.2v, v+ = 2.7v t a = +25? -32 -40 -48 ma segment current slew rate ? i seg / ? tt a = +25?, v+ = 3.3v 11 ma/? segment drive current matching ? i seg t a = +25?, v+ = 3.3v 5 % logic input s and output s input high voltage sda, scl, ad0, ad1 v ih 0.7 x v+ v input low voltage sda, scl, ad0, ad1 v il 0.3 x v+ v input leakage current sda, scl, ad0, ad1, osc, p0, p1, p2, p3, p4/ irq i ih , i il -1 +1 ? sda output low voltage v olsda i sink = 6ma 0.4 v port logic-high input voltage p0, p1, p2, p3, p4/ irq v ihp 0.7 x v+ v port logic-low input voltage p0, p1, p2, p3, p4/ irq v ilp 0.3 x v+ v port hysteresis voltage p0, p1, p2, p3, p4/ irq ? v ip 0.03 x v+ v port input pullup current from v+ i ipu p0 to p3 configured as key-scan inputs, v+ = 3.3v 75 ? port output low voltage v olp i sink = 8ma 0.3 0.5 v blink output low voltage v olbk i sink = 0.6ma 0.1 0.3 v osc_out output high voltage v ohosc i source = 1.6ma v+ - 0.4 v osc_out output low voltage v olosc i sink = 1.6ma 0.4 v
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 4 www.maximintegrated.com timing characteristics (typical operating circuit, v+ = 2.7v to 5.5v, t a = t min to t max , unless otherwise noted.) (note 1) parameter s ymbol condition s min typ max unit s timing characteri s tic s serial clock frequency f scl 400 khz bus free time between a stop and a start condition t buf 1.3 ? hold time (repeated) start condition t hd , t sta 0.6 ? repeated start condition setup time t su , t sta 0.6 ? stop condition setup time t su:sto 0.6 ? data hold time t hd , t dat (note 3) 0.9 ? data setup time t su , t dat 100 ns scl clock low period t low 1.3 ? scl clock high period t high 0.6 ? rise time of both sda and scl signals, receiving t r (notes 2, 4) 20 + 0.1c b 300 ns fall time of both sda and scl signals, receiving t f (notes 2, 4) 20 + 0.1c b 300 ns fall time of sda transmitting t f , t x (notes 2, 5) 20 + 0.1c b 300 ns pulse width of spike suppressed t sp (notes 2, 6) 0 50 ns capacitive load for each bus line c b (note 2) 400 pf note 1: all parameters tested at t a = +25?. specifications over temperature are guaranteed by design. note 2: guaranteed by design. note 3: a master device must provide a hold time of at least 300ns for the sda signal (referred to v il - of the scl signal) in order to bridge the undefined region of scl? falling edge. note 4: c b = total capacitance of one bus line in pf. t r and t f measured between 0.3v+ and 0.7v+. note 5: i sink 6ma. c b = total capacitance of one bus line in pf. t r and t f measured between 0.3v+ and 0.7v+. note 6: input filters on the sda and scl inputs suppress noise spikes less than 50ns.
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 5 www.maximintegrated.com internal oscillator frequency vs. temperature max6955 toc01 temperature ( c) oscillator frequency (mhz) 110 80 50 20 -10 3.8 4.0 4.2 4.4 3.6 -40 r set = 56k ? c set = 22pf supply voltage (v) 5.0 4.5 4.0 3.5 3.0 2.5 5.5 internal oscillator frequency vs. supply voltage max6955 toc02 oscillator frequency (mhz) 3.8 4.0 4.2 4.4 3.6 r set = 56k ? c set = 22pf 100ns/div osc: 500mv/div osc_out: 2v/div max6954 toc03 osc 0v 0v osc_out internal oscillator waveform at osc and osc_out pins r set = 56k ? c set = 22pf dead clock oscillator frequency vs. supply voltage 85 90 95 100 105 110 80 supply voltage (v) 5.0 4.5 4.0 3.5 3.0 2.5 5.5 max6955 toc04 oscillator frequency (mhz) r set = 56k ? c set = gnd current normalized to 40ma 0.94 0.96 0.98 1.00 1.02 0.92 segment source current vs. supply voltage supply voltage (v) 5.0 4.5 4.0 3.5 3.0 2.5 5.5 max6955 toc05 v led = 1.8v 1v/div 200 s/div max6954 toc06 o0 o18 waveform at pins o0 and o18, maximum intensity 0v 0v gpio sink current vs. temperature max 6955 toc07 temperature ( c) gpio sink current (ma) 110 80 50 20 -10 5 10 15 20 25 30 35 40 45 0 -40 v cc = 5.5v v cc = 3.3v v cc = 2.5v output = low v port = 0.6v port input pullup current vs. temperature max6955 toc08 temperature ( c) key-scan source current (ma) 110 80 50 20 -10 0.1 0.2 0.3 0.4 0.5 0 -40 v cc = 5.5v v cc = 3.3v v cc = 2.5v output = high v port = 1.4v 400 s/div key_a: 1v/div irq: 2v/div max6954 toc09 key_a 0v 0v irq key-scan operation (key_a and irq) typical operating characteristics (v+ = 3.3v, led forward voltage = 2.4v, typical application circuit, t a = +25?, unless otherwise noted.)
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 6 www.maximintegrated.com detailed description the max6955 is a serially interfaced display driver that can drive up to 16 digits 7-segment, 8 digits 14-seg- ment, 8 digits 16-segment, 128 discrete leds, or a combination of these display types. table 1 shows the drive capability of the max6955 for monocolor and bicolor displays. the max6955 includes 104-character ascii font maps for 14-segment and 16-segment displays, as well as the hexadecimal font map for 7-segment displays. the characters follow the standard ascii font, with the addition of the following common symbols: ? , ? ? ? ? , and . seven bits represent the 104-character font map; an 8th bit is used to select whether the deci- mal point (dp) is lit. seven-segment led digits can be controlled directly or use the hexadecimal font. direct segment control allows the max6955 to be used to drive bar graphs and discrete led indicators. tables 2, 3, and 4 list the connection schemes for 16-, 14-, and 7-segment digits, respectively. the letters in tables 2, 3, and 4 correspond to the segment labels shown in figure 1. (for applications that require mixed display types, see tables 38?1.) serial interface serial addressing the max6955 operates as a slave that sends and receives data through an i 2 c-compatible 2-wire inter- face. the interface uses a serial data line (sda) and a pin description pin ss op tqfn-ep name function 1, 2, 34, 35 36, 37, 33, 34 p0?3 general-purpose i/o ports (gpios). gpio can be configured as logic inputs or open-drain outputs. enabling key scanning configures some or all ports p0?3 as key-switch matrix inputs with internal pullup (key_a through key_d). 3 38 ad0 address input 0. sets device slave address. connect to gnd, v+, scl, or sda to give four logic combinations. see table 5. 4 39 sda i 2 c-compatible serial data i/o 5 40 scl i 2 c-compatible serial clock input 6 1 ad1 address input 1. sets device slave address. connect to gnd, v+, scl, or sda to give four logic combinations. see table 5. 7?5, 22?1 2?0, 21?0 o0?18 digit/segment drivers. when acting as digit drivers, outputs o0 to o7 sink current from the display common cathodes. when acting as segment drivers, o0 to o18 source current to the display anodes. o0 to o18 are high impedance when not being used as digit or segment drivers. 16, 18 12, 13, 15 gnd ground 17 14 iset segment current setting. connect iset to gnd through series resistor r set to set the peak current. 19, 21 16, 18, 19 v+ positive supply voltage. bypass v+ to gnd with a 47? bulk capacitor and a 0.1? ceramic capacitor. 20 17 osc multiplex clock input. to use internal oscillator, connect capacitor c set from osc to gnd. to use external clock, drive osc with a 1mhz to 8mhz cmos clock. 32 31 blink blink clock output. output is open drain. 33 32 osc_out clock output. osc_out is a buffered clock output to allow easy blink synchronization of multiple max6955s. output is push-pull. 36 35 p4/ irq general-purpose i/o port. also functions as irq output when key scanning is enabled. 11, 20 n.c. not internally connected ep exposed paddle. internally connected to gnd. connect to a large ground plane to improve thermal performance.
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 7 www.maximintegrated.com serial clock line (scl) to achieve bidirectional commu- nication between master(s) and slave(s). a master (typ- ically a microcontroller) initiates all data transfers to and from the max6955, and generates the scl clock that synchronizes the data transfer (figure 2). the max6955 sda line operates as both an input and an open-drain output. a pullup resistor, typically 4.7k ? , is required on the sda. the max6955 scl line oper- ates only as an input. a pullup resistor, typically 4.7k ? , is required on scl if there are multiple masters on the 2-wire interface, or if the master in a single-master sys- tem has an open-drain scl output. each transmission consists of a start condition (figure 3) sent by a master, followed by the max6955 7-bit slave address plus r/ w bit (figure 4), a register address byte, 1 or more data bytes, and finally a stop condition (figure 3). start and stop conditions both scl and sda remain high when the interface is not busy. a master signals the beginning of a transmis- sion with a start (s) condition by transitioning sda from high to low while scl is high. when the master has finished communicating with the slave, it issues a stop (p) condition by transitioning the sda from low to high while scl is high. the bus is then free for another transmission (figure 3). bit transfer one data bit is transferred during each clock pulse. the data on the sda line must remain stable while scl is high (figure 5). acknowledge the acknowledge bit is a clocked 9th bit that the recipient uses to handshake receipt of each byte of data (figure 6). thus, each byte transferred effectively requires 9 bits. the master generates the 9th clock pulse, and the recipient pulls down sda during the acknowledge clock pulse, such that the sda line is stable low during the high period of the clock pulse. when the master is transmitting to the max6955, the max6955 generates the acknowledge bit because the max6955 is the recipient. when the max6955 is transmitting to the master, the master gener- ates the acknowledge bit because the master is the recipi- ent. slave address the max6955 has a 7-bit-long slave address (figure 4). the eighth bit following the 7-bit slave address is the r/ w bit. it is low for a write command, high for a read command. the first 3 bits (msbs) of the max6955 slave address are always 110. slave address bits a3, a2, a1, and a0 are selected by the address input pins ad1 and ad0. these two input pins can be connected to gnd, v+, sda, or scl. the max6955 has 16 possible slave addresses (table 5) and therefore a maximum of 16 max6955 devices can share the same interface. di s play type 7 s egment (16-character hexadecimal font) 14 s egment/ 16 s egment (104-character a s cii font map) di s crete led s (direct control) monocolor 16 8 128 bicolor 8 4 64 table 1. max6955 drive capability 1dp 2dp fb ec d2 a1 i l g1 g2 hj mk a2 d1 dp dp 1a 1g 1f 1b 1e 1c 1d 2a 2g 2f 2b 2e 2c 2d fb ec d a i l g1 g2 hj mk figure 1. segment labeling for 7-segment display, 14-segment display, and 16-segment display
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 8 www.maximintegrated.com message format for writing a write to the max6955 comprises the transmission of the max6955? slave address with the r/ w bit set to zero, followed by at least 1 byte of information. the first byte of information is the command byte, which deter- mines which register of the max6955 is to be written by the next byte, if received. if a stop condition is detect- ed after the command byte is received, then the max6955 takes no further action (figure 7) beyond storing the command byte. any bytes received after the command byte are data bytes. the first data byte goes into the internal register of the max6955 selected by the command byte (figure 8). if multiple data bytes are transmitted before a stop condition is detected, these bytes are generally stored in subsequent max6955 internal registers because the command byte address generally autoincrements (table 6) (figure 9). digit o0 o1 o2 o3 o4 o5 o6 o7 o8 o9 o10 o11 o12 o13 o14 o15 o16 o17 o18 0cco a1a2 b c d1d2 e f g1g2 h i j k l m dp 1 cc1 a1 a2 b c d1 d2 e f g1 g2 h i j k l m dp 2 a1a2cc2 b c d1d2 e f g1g2 h i j k l m dp 3 a1 a2 cc3 b c d1 d2 e f g1 g2 h i j k l m dp 4 a1a2 b ccc4d1d2 e f g1g2 h i j k l m dp 5 a1 a2 b c cc5 d1 d2 e f g1 g2 h i j k l m dp 6 a1 a2 b c d1 d2 cc6 e f g1 g2 h i j k l m dp 7 a1 a2 b c d1 d2 cc7 e f g1 g2 h i j k l m dp digit o0 o1 o2 o3 o4 o5 o6 o7 o8 o9 o10 o11 o12 o13 o14 o15 o16 o17 o18 0 cco a b c d e f g1 g2 h i j k l m dp 1 cc1 a b c d e f g1 g2 h i j k l m dp 2 a cc2 b c d e f g1 g2 h i j k l m dp 3 a cc3 b c d e f g1 g2 h i j k l m dp 4 a? ccc4d? fg1g2h i j k l mdp 5 a b c cc5 d e f g1 g2 h i j k l m dp 6 a? c dcc6? fg1g2h i j k l mdp 7 a b c d cc7 e f g1 g2 h i j k l m dp table 2. connection scheme for eight 16-segment digits table 3. connection scheme for eight 14-segment digits digit o0 o1 o2 o3 o4 o5 o6 o7 o8 o9 o10 o11 o12 o13 o14 o15 o16 o17 o18 0, 0a cc0 1a 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp 1, 1a cc1 1a 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp 2, 2a 1a cc2 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp 3, 3a 1a cc3 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp 4, 4a 1a 1b 1c cc4 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp 5, 5a 1a 1b 1c cc5 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp 6, 6a1a1b1c1d1dpcc6 1e 1f 1g2a2b2c2d2e 2f 2g2dp 7, 7a 1a 1b 1c 1d 1dp cc7 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp table 4. connection scheme for sixteen 7-segment digits
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 9 www.maximintegrated.com sda start condition stop condition scl s p sda scl msb start 1 1 0 a3 a2 a1 a0 r/w lsb ack figure 3. start and stop conditions figure 4. slave address sda t low t buf t su, dat t su, sta t hd, sta t su, sto t hd, dat t high t r t f scl start condition start condition stop condition repeated start condition t hd, sta figure 2. 2-wire serial interface timing details
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 10 www.maximintegrated.com message format for reading the max6955 is read using the max6955? internally stored command byte as address pointer, the same way the stored command byte is used as address pointer for a write. the pointer generally autoincrements after each data byte is read using the same rules as for a write (table 6). thus, a read is initiated by first config- uring the max6955? command byte by performing a write (figure 7). the master can now read n consecu- tive bytes from the max6955, with the first data byte being read from the register addressed by the initial- ized command byte (figure 9). when performing read- after-write verification, reset the command byte? address because the stored byte address generally is autoincremented after the write (table 6). operation with multiple masters if the max6955 is operated on a 2-wire interface with multiple masters, a master reading the max6955 should use a repeated start between the write, which sets the max6955? address pointer, and the read(s) that takes the data from the location(s). this is because it is possible for master 2 to take over the bus after master 1 has set up the max6955? address pointer but before master 1 has read the data. if master 2 subse- quently changes the max6955? address pointer, then master 1? delayed read may be from an unexpected location. command address autoincrementing address autoincrementing allows the max6955 to be configured with the shortest number of transmissions by minimizing the number of times the command byte needs to be sent. the command address or the font pointer address stored in the max6955 generally incre- ments after each data byte is written or read (table 6). to utilize the autoincrement read cycle feature, the mas- ter clocks scl after the first data byte is read, and the max6955 continues sending data, incrementing the pointer after each byte is sent. a not-ack nowledge or stop condition halts autoincrement. digit type registers the max6955 uses 32 digit registers to store the char- acters that the user wishes to display. these digit regis- ters are implemented with two planes, p0 and p1. each digit is represented by 2 bytes of memory, 1 byte in plane p0 and the other in plane p1. the digit registers are mapped so that a digit? data can be updated in plane p0, plane p1, or both planes at the same time (table 7). if the blink function is disabled through the blink enable bit e (table 20) in the configuration register, then the digit register data in plane p0 is used to multiplex the display. the digit register data in p1 is not used. if the blink function is enabled, then the digit register data in both plane p0 and plane p1 are alternately used to mul- tiplex the display. blinking is achieved by multiplexing the led display using data plane p0 and plane p1 on alternate phases of the blink clock (table 21). command byte addre ss range autoincrement behavior x0000000 to x0001100 command byte address autoincrements after byte read or written. x0001101 factory reserved; do not write this register. x0001111 to x1111110 command byte address autoincrements after byte read or written. x1111111 command byte address remains at x1111111 after byte read or written. table 5. max6955 address map table 6. command address autoincrement rules pin connection device addre ss ad1 ad0 a6a5a4a3a2a1a0 gnd gnd1100000 gnd v+ 1100001 gnd sda 1100010 gnd scl 1100011 v+ gnd1100100 v+ v+ 1100101 v+ sda 1100110 v+ scl 1100111 sda gnd1101000 sda v+ 1101001 sda sda 1101010 sda scl 1101011 scl gnd1101100 scl v+ 1101101 scl sda 1101110 scl scl 1101111
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 11 www.maximintegrated.com the data in the digit registers does not control the digit segments directly for 14- and 16-segment displays. instead, the register data is used to address a charac- ter generator that stores the data for the 14- and 16- segment fonts (tables 8 and 9). the lower 7 bits of the digit data (d6 to d0) select the character from the font. the most significant bit of the register data (d7) con- trols the dp segment of the digits; it is set to 1 to light dp, and to zero to leave dp unlit (table 10). for 7-segment displays, the digit plane data register can be used to address a character generator, which contains the data of a 16-character font containing the hexadecimal font. the decode mode register can be used to disable the character generator and allow the segments to be controlled directly. table 11 shows the one-to-one pairing of each data bit to the appropriate segment line in the digit plane data registers. the hexa- decimal font is decoded according to table 12. the digit-type register configures the display driver for various combinations of 14-segment digits, 16-segment digits, and/or pairs, or 7-segment digits. the function of this register is to select the appropriate font for each digit and route the output of the font to the appropriate max6955 driver output pins. the max6955 has four digit drive slots. a slot can be filled with various combi- nations of monocolor and bicolor 16-segment displays, 14-segment displays, or two 7-segment displays. each pair of bits in the register corresponds to one of the four digit drive slots, as shown in table 13. each bit also cor- responds to one of the eight common-cathode digit drive outputs, cc0 to cc7. when using bicolor digits, the anode connections for the two digits within a slot are always the same. this means that a slot correctly drives two monocolor or one bicolor 14- or 16-segment digit. the digit type register can be written, but cannot be read. examples of configuration settings required for some display digit combinations are shown in table 14. 7-segment decode-mode register in 7-segment mode, the hexadecimal font can be dis- abled (table 15). the decode-mode register selects between hexadecimal code or direct control for each of eight possible pairs of 7-segment digits. each bit in the register corresponds to one pair of digits. the digit pairs are {digit 0, digit 0a} through {digit 7, digit 7a}. disabling decode mode allows direct control of the 16 leds of a dual 7-segment display. direct control mode can also be used to drive a matrix of 128 discrete leds. a logic high selects hexadecimal decoding, while a logic low bypasses the decoder. when direct control is selected, the data bits d7 to d0 correspond to the seg- ment lines of the max6955. write x0010000 to blank all segments in hexadecimal decode mode. display blink mode the display blinking facility, when enabled, makes the driver flip automatically between displaying the digit register data in planes p0 and p1. if the digit register data for any digit is different in the two planes, then that digit appears to flip between two characters. to make a character appear to blink on or off, write the character to one plane, and use the blank character (0x20) for the other plane. once blinking has been configured, it con- tinues automatically without further intervention. blink speed the blink speed is determined by the frequency of the multiplex clock, osc, and by the setting of the blink rate selection bit b (table 19) in the configuration reg- ister. the blink rate selection bit b sets either fast or slow blink speed for the whole display. initial power-up on initial power-up, all control registers are reset, the display is blanked, intensities are set to minimum, and shutdown is enabled (table 16). configuration register the configuration register is used to enter and exit shut- down, select the blink rate, globally enable and disable the blink function, globally clear the digit data, select between global or digit-by-digit control of intensity, and reset the blink timing (tables 17?0 and 22?5). the configuration register contains 7 bits: s bit selects shutdown or normal operation (read/write). b bit selects the blink rate (read/write). e bit globally enables or disables the blink function (read/write). t bit resets the blink timing (data is not stored?ran- sient bit). r bit globally clears the digit data for both planes p0 and p1 for all digits (data is not stored?ransient bit). i bit selects between global or digit-by-digit control of intensity (read/write). p bit returns the current phase of the blink timing (read only? write to this bit is ignored). character generator font mapping the font is composed of 104 characters in rom. the lower 7 bits of the 8-bit digit register represent the char- acter selection. the most significant bit, shown as x in the rom map of tables 8 and 9, is 1 to light the dp segment and zero to leave the dp segment unlit. the character map follows the standard ascii font for 96 characters in the x0101000 through x1111111
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 12 www.maximintegrated.com range. the first 16 characters of the 16-segment rom map cover 7-segment displays. these 16 characters are numeric 0 to 9 and characters a to f (i.e., the hexa- decimal set). multiplex clock and blink timing the osc pin can be fitted with capacitor c set to gnd to use the internal rc multiplex oscillator, or driven by an external clock to set the multiplex clock frequency and blink rate. the multiplex clock frequency determines the frequency that the complete display is updated. with osc at 4mhz, each display digit is enabled for 200?. the internal rc oscillator uses an external resistor, r set , and an external capacitor, c set , to set the oscil- lator frequency. the suggested values of r set (56k ? ) and c set (22pf) set the oscillator at 4mhz, which makes the blink frequency 0.5hz or 1hz. the external clock is not required to have a 50:50 duty cycle, but the minimum time between transitions must be 50ns or greater and the maximum time between transitions must be 750ns. the on-chip oscillator may be accurate enough for applications using a single device. if an exact blink rate is required, use an external clock ranging between 1mhz and 8mhz to drive osc. the osc inputs of multi- ple max6955s can be connected to a common external clock to make the devices blink at the same rate. the relative blink phasing of multiple max6955s can be syn- chronized by setting the t bit in the control register for all the devices in quick succession. if the serial inter- faces of multiple max6955s are daisy-chained by con- necting the dout of one device to the din of the next, then synchronization is achieved automatically by updating the configuration register for all devices simul- taneously. figure 10 is the multiplex timing diagram. osc_out output the osc_out output is a buffered copy of either the internal oscillator clock or the clock driven into the osc pin if the external clock has been selected. the feature is useful if the internal oscillator is used, and the user wishes to synchronize other max6955s to the same blink frequency. the oscillator is disabled while the max6955 is in shutdown. scan-limit register the scan-limit register sets how many 14-segment dig- its or 16-segment digits or pairs of 7-segment digits are displayed, from 1 to 8. a bicolor digit is connected as two monocolor digits. the scan register also limits the number of keys that can be scanned. since the number of scanned digits affects the display brightness, the scan-limit register should not be used to blank portions of the display (such as leading-zero sup- pression). table 26 shows the scan-limit register format. intensity registers digital control of display brightness is provided and can be managed in one of two ways: globally or individ- ually. global control adjusts all digits together. individual control adjusts the digits separately. the default method is global brightness control, which is selected by clearing the global intensity bit (i data bit d6) in the configuration register. this brightness setting applies to all display digits. the pulse-width modulator is then set by the lower nibble of the global intensity register, address 0x02. the modulator scales the aver- age segment current in 16 steps from a maximum of 15/16 down to 1/16 of the peak current. the minimum interdigit blanking time is set to 1/16 of a cycle. when using bicolor digits, 256 color/brightness combinations are available. individual brightness control is selected by setting the global intensity bit (i data bit d6) in the configuration register. the pulse-width modulator is now no longer set by the lower nibble of the global intensity register, address 0x02, and the data is ignored. individual digital control of display brightness is now provided by a sep- arate pulse-width modulator setting for each digit. each digit is controlled by a nibble of one of the four intensity registers: intensity10, intensity32, intensity54, and inten- sity76 for all display types, plus intensity10a, intensi- ty32a, intensity54a, and intensity76a for the extra eight digits possible when 7-segment displays are used. the data from the relevant register is used for each digit as it is multiplexed. the modulator scales the average segment current in 16 steps in exactly the same way as global intensity adjustment. table 27 shows the global intensity register format. table 28 shows individual segment intensity registers. table 29 shows the even individual segment intensity format. table 30 shows the odd individual segment intensity format. gpio and key scanning the max6955 features five general-purpose input/out- put (gpio) ports: p0 to p4. these ports can be individ- ually enabled as logic inputs or open-drain logic outputs. the gpio ports are not debounced when con- figured as inputs. the ports can be read and the out- puts set using the 2-wire interface. some or all of the five ports can be configured to per- form key scanning of up to 32 keys. ports p0 to p4 are renamed key_a, key_b, key_c, key_d, and irq, respectively, when used for key scanning. the full key- scanning configuration is shown in figure 11. table 31 is the gpio data register.
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 13 www.maximintegrated.com addre ss (command byte) regi s ter d15 d14 d13 d12 d11 d10 d9 d8 hex code no-op x 0 0 0 0 0 0 0 0x00 decode mode x 0 0 0 0 0 0 1 0x01 global intensity x 0 0 0 0 0 1 0 0x02 scan limit x 0 0 0 0 0 1 1 0x03 configuration x 0 0 0 0 1 0 0 0x04 gpio data x 0 0 0 0 1 0 1 0x05 port configuration x 0 0 0 0 1 1 0 0x06 display test x 0 0 0 0 1 1 1 0x07 write key_a mask read key_a debounce x 0 0 0 1 0 0 0 0x08 write key_b mask read key_b debounce x 0 0 0 1 0 0 1 0x09 write key_c mask read key_c debounce x 0 0 0 1 0 1 0 0x0a write key_d mask read key_d debounce x 0 0 0 1 0 1 1 0x0b write digit type read key_a pressed x 0 0 0 1 1 0 0 0x0c read key_b pressed* x 0 0 0 1 1 0 1 0x0d read key_c pressed* x 0 0 0 1 1 1 0 0x0e read key_d pressed* x 0 0 0 1 1 1 1 0x0f intensity 10 x 0 0 1 0 0 0 0 0x10 intensity 32 x 0 0 1 0 0 0 1 0x11 intensity 54 x 0 0 1 0 0 1 0 0x12 intensity 76 x 0 0 1 0 0 1 1 0x13 intensity 10a (7 segment only) x 0 0 1 0 1 0 0 0x14 intensity 32a (7 segment only) x 0 0 1 0 1 0 1 0x15 intensity 54a (7 segment only) x 0 0 1 0 1 1 0 0x16 intensity 76a (7 segment only) x 0 0 1 0 1 1 1 0x17 digit 0 plane p0 x 0 1 0 0 0 0 0 0x20 digit 1 plane p0 x 0 1 0 0 0 0 1 0x21 digit 2 plane p0 x 0 1 0 0 0 1 0 0x22 digit 3 plane p0 x 0 1 0 0 0 1 1 0x23 digit 4 plane p0 x 0 1 0 0 1 0 0 0x24 digit 5 plane p0 x 0 1 0 0 1 0 1 0x25 digit 6 plane p0 x 0 1 0 0 1 1 0 0x26 digit 7 plane p0 x 0 1 0 0 1 1 1 0x27 digit 0a plane p0 (7 segment only) x 0 1 0 1 0 0 0 0x28 digit 1a plane p0 (7 segment only) x 0 1 0 1 0 0 1 0x29 digit 2a plane p0 (7 segment only) x 0 1 0 1 0 1 0 0x2a digit 3a plane p0 (7 segment only) x 0 1 0 1 0 1 1 0x2b table 7. register address map * do not write to register.
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 14 www.maximintegrated.com addre ss (command byte) regi s ter d15 d14 d13 d12 d11 d10 d9 d8 hex code digit 4a plane p0 (7 segment only) x 0 1 0 1 1 0 0 0x2c digit 5a plane p0 (7 segment only) x 0 1 0 1 1 0 1 0x2d digit 6a plane p0 (7 segment only) x 0 1 0 1 1 1 0 0x2e digit 7a plane p0 (7 segment only) x 0 1 0 1 1 1 1 0x2f digit 0 plane p1 x 1 0 0 0 0 0 0 0x40 digit 1 plane p1 x 1 0 0 0 0 0 1 0x41 digit 2 plane p1 x 1 0 0 0 0 1 0 0x42 digit 3 plane p1 x 1 0 0 0 0 1 1 0x43 digit 4 plane p1 x 1 0 0 0 1 0 0 0x44 digit 5 plane p1 x 1 0 0 0 1 0 1 0x45 digit 6 plane p1 x 1 0 0 0 1 1 0 0x46 digit 7 plane p1 x 1 0 0 0 1 1 1 0x47 digit 0a plane p1 (7 segment only) x 1 0 0 1 0 0 0 0x48 digit 1a plane p1 (7 segment only) x 1 0 0 1 0 0 1 0x49 digit 2a plane p1 (7 segment only) x 1 0 0 1 0 1 0 0x4a digit 3a plane p1 (7 segment only) x 1 0 0 1 0 1 1 0x4b digit 4a plane p1 (7 segment only) x 1 0 0 1 1 0 0 0x4c digit 5a plane p1 (7 segment only) x 1 0 0 1 1 0 1 0x4d digit 6a plane p1 (7 segment only) x 1 0 0 1 1 1 0 0x4e digit 7a plane p1 (7 segment only) x 1 0 0 1 1 1 1 0x4f write digit 0 planes p0 and p1 with same data, reads as 0x00 x 1 1 0 0 0 0 0 0x60 write digit 1 planes p0 and p1 with same data, reads as 0x00 x 1 1 0 0 0 0 1 0x61 write digit 2 planes p0 and p1 with same data, reads as 0x00 x 1 1 0 0 0 1 0 0x62 write digit 3 planes p0 and p1 with same data, reads as 0x00 x 1 1 0 0 0 1 1 0x63 write digit 4 planes p0 and p1 with same data, reads as 0x00 x 1 1 0 0 1 0 0 0x64 write digit 5 planes p0 and p1 with same data, reads as 0x00 x 1 1 0 0 1 0 1 0x65 write digit 6 planes p0 and p1 with same data, reads as 0x00 x 1 1 0 0 1 1 0 0x66 write digit 7 planes p0 and p1 with same data, reads as 0x00 x 1 1 0 0 1 1 1 0x67 write digit 0a planes p0 and p1 with same data (7 segment only), reads as 0x00 x 1 1 0 1 0 0 0 0x68 write digit 1a planes p0 and p1 with same data (7 segment only), reads as 0x00 x 1 1 0 1 0 0 1 0x69 table 7. register address map (continued)
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 15 www.maximintegrated.com one diode is required per key switch. note that the for- ward voltages of the diode and led must exceed v ih of p0?3. if this condition is not met, the voltage input to the port might be lower than the logic threshold and keys will not be detected properly. the max6955 can only scan the maximum 32 keys if the scan-limit register is set to scan the maximum eight digits. if the max6955 is driving fewer digits, then a maximum of (4 x n) switches can be scanned, where n is the number of digits set in the scan-limit register. for example, if the max6955 is driving four 14-segment digits, cathode drivers o0 to o3 are used. only 16 keys can be scanned in this configuration; the switches shown connected to o4 through o7 are not read. if the user wishes to scan fewer than 32 keys, then fewer scan lines can be configured for key scanning. the unused key_x ports are released back to their orig- inal gpio functionality. if key scanning is enabled, regardless of the number of keys being scanned, p4/ irq is always configured as irq (table 32). the key-scanning circuit utilizes the leds?common- cathode driver outputs as the key-scan drivers. o0 to o7 go low for nominally 200? (with osc = 4mhz) in turn as the displays are multiplexed. by varying the oscillator frequency, the debounce time changes, though key scanning still functions. key_x inputs have internal pullup resistors that allow the key condition to be tested. the key_x input is low during the appropri- ate digit multiplex period when the key is pressed. the timing diagram of figure 12 shows the normal situation where all eight led cathode drivers are used. addre ss (command byte) regi s ter d15 d14 d13 d12 d11 d10 d9 d8 hex code write digit 2a planes p0 and p1 with same data (7 segment only), reads as 0x00 x 1 1 0 1 0 1 0 0x6a write digit 3a planes p0 and p1 with same data (7 segment only), reads as 0x00 x 1 1 0 1 0 1 1 0x6b write digit 4a planes p0 and p1 with same data (7 segment only), reads as 0x00 x 1 1 0 1 1 0 0 0x6c write digit 5a planes p0 and p1 with same data (7 segment only), reads as 0x00 x 1 1 0 1 1 0 1 0x6d write digit 6a planes p0 and p1 with same data (7 segment only), reads as 0x00 x 1 1 0 1 1 1 0 0x6e write digit 7a planes p0 and p1 with same data (7 segment only), reads as 0x00 x 1 1 0 1 1 1 1 0x6f table 7. register address map (continued) note: unused register bits read as zero. sda data line stable, data valid change of data allowed scl figure 5. bit transfer 1 scl start condition sda by transmitter sda by receiver s 28 9 clock pulse for acknowledgment figure 6. acknowledge
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 16 www.maximintegrated.com each key press is scanned twice in a 25.6ms time peri- od with a nominal oscillator frequency of 4mhz, as shown in figure 12. in the first key test period of 1.6ms, input level at ports p0?3 (key_a, key_b, key_c, and key_d) are examined in conjunction with the signal-low period of ports o0?7 to see if any key is pressed. if pressed, the corresponding key pressed register bit is set. in the second key test period of 1.6ms, input level at ports p0?3 are examined again (debounce) to see if the key is still pressed. if still pressed, the correspond- ing debounce register bit is set. the debounce time between key tests is 12.8ms. port configuration register the port configuration register selects how the five port pins are used. the port configuration register format is described in table 33. key mask registers the key_a mask, key_b mask, key_c mask, and key_d mask write-only registers (table 34) configure the key-scanning circuit to cause an interrupt only when selected (masked) keys have been debounced. each bit in the register corresponds to one key switch. the bit is clear to disable interrupt for the switch, and set to enable interrupt. keys are always scanned (if enabled through the port configuration register), regardless of the setting of these interrupt bits, and the key status is stored in the appropriate key_x pressed register. s a 0 slave address command byte acknowledge from max6955 r/w acknowledge from max6955 d15 d14 d13 d12 d11 d10 d 9 d 8 command byte is stored on receipt of stop condition a p figure 7. command byte received ap 0 slave address command byte data byte acknowledge from max6955 r/w 1 byte autoincrement memory word address acknowledge from max6955 acknowledge from max6955 d15 d14 d13 d12 d11 d10 d9 d8 d1 d0 d3 d2 d5 d4 d7 d6 how control byte and data byte map into max6955's registers s a a figure 8. command and single data byte received ap 0 slave address command byte data byte acknowledge from max6955 r/w n byte autoincrement memory word address acknowledge from max6955 acknowledge from max6955 d15 d14 d13 d12 d11 d10 d9 d8 d1 d0 d3 d2 d5 d4 d7 d6 how control byte and data byte map into max6955's registers s a a figure 9. n data bytes received
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 17 www.maximintegrated.com digit 1 one complete 1.6ms multiplex cycle around 8 digits digit 0's 200 s multiplex timeslot digit 0 200 s digit 2 digit 3 digit 4 digit 5 digit 6 digit 7 start of next cycle low 2/16th 1/16th (min on) high-z high-z low 3/16th high-z low 4/16th high-z low 5/16th high-z low 6/16th high-z low 7/16th high-z low 8/16th high-z low 9/16th high-z low 10/16th high-z low 11/16th high-z low 12/16th high-z low 13/16th high-z low 14/16th high-z low 15/16th high-z low 15/16th high-z (max on) high-z high-z current source enabled minimum 12.5 s interdigit blanking interval high-z anode (lit) digit 0 cathode driver intensity settings anode (unlit) figure 10. multiplex timing diagram (osc = 4mhz)
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 18 www.maximintegrated.com led output 00 led output 01 led output 02 led output 03 led output 04 led output 05 led output 06 led output 07 first key test period start end second key test period (debounce) start start of next key-scan cycle interrupt asserted if period debounce register updated end 12.5 s to 187.5 s digit period 1.6ms multiplex cycle 1 12.8ms first half key-scan cycle 12.8ms second half key-scan cycle a 25.6ms key-scan cycle 1.6ms multiplex cycle 2 1.6ms multiplex cycle 8 1.6ms multiplex cycle 1 1.6ms multiplex cycle 6 figure 11. key-scanning configuration sw a0 sw a1 sw a2 sw a3 sw a4 sw a5 sw a6 sw a7 key_a (p0) v cc led output o0 led output o1 led output o2 led output o3 led output o4 led output o5 led output o6 led output o7 key_b (p1) key_c (p2) key_d (p3) irq (p4) microcontroller interrupt sw b0 sw b1 sw b2 sw b3 sw b4 sw b5 sw b6 sw b7 sw c0 sw c1 sw c2 sw c3 sw c4 sw c5 sw c6 sw c7 sw d0 led0 led segment is optional and based on application. sw d1 sw d2 sw d3 sw d4 sw d5 sw d6 sw d7 led1 led2 led3 led4 led5 figure 12. key-scan timing diagram
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 19 www.maximintegrated.com key debounced registers the key_a debounced, key_b debounced, key_c debounced, and key_d debounced read-only registers (table 35) show which keys have been detected as debounced by the key-scanning circuit. each bit in the register corresponds to one key switch. the bit is set if the switch has been correctly debounced since the register was read last. reading a debounced register clears that register (after the data has been read) so that future keys pressed can be identified. if the debounced registers are not read, the key-scan data accumulates. however, as there is no fifo in the max6955, the user is not able to determine key order, or whether a key has been pressed more than once, unless the debounced key status registers are read after each interrupt, and before the next key- scan cycle. reading any of the four debounced registers clears the p4/ irq output. if a key is pressed and held down, the key is reported as debounced (and irq issued) only once. the key must be detected as released by the key- scanning circuit, before it debounces again. if the debounced registers are being read in response to the p4/ irq being asserted, then the user should generally read all four registers to ensure that all the keys that were detected by the key-scanning circuit are discovered. key pressed registers the key_a pressed, key_b pressed, key_c pressed, and key_d pressed read-only registers (table 36) show which keys have been detected as pressed by the key-scanning circuit during the last test. each bit in the register corresponds to one key switch. the bit is set if the switch has been detected as pressed by the key-scanning circuit during the last test. the bit is cleared if the switch has not been detected as pressed by the key-scanning circuit during the last test. reading a pressed register does not clear that register or clear the p4/ irq output. display test register the display test register (table 37) operates in two modes: normal and display test. display test mode turns all leds on (including dps) by overriding, but not altering, all controls and digit registers (including the shutdown register), except for the digit-type register and the gpio configuration register. the duty cycle, while in display test mode, is 7/16 (see the choosing supply voltage to minimize power dissipation section). external components r set and cset to set oscillator frequency and peak segment current the rc oscillator uses an external resistor, r set , and an external capacitor, c set , to set the frequency, f osc . the allowed range of f osc is 1mhz to 8mhz. r set also sets the peak segment current. the recommended val- ues of r set and c set set the oscillator to 4mhz, which makes the blink frequencies selectable between 0.5hz and 1hz. the recommended value of r set also sets the peak current to 40ma, which makes the segment cur- rent adjustable from 2.5ma to 37.5ma in 2.5ma steps. i seg = k l /r set ma f osc = k f /(r set x c set ) mhz where: k l = 2240 k f = 10k (typ) r set = external resistor in k ? c set = external capacitor in pf c stray = stray capacitance from osc pin to gnd in pf the recommended value of r set is 56k ? and the rec- ommended value of c set is 22pf. the recommended value of r set is the minimum allowed value, since it sets the display driver to the maximum allowed peak segment current. r set can be set to a higher value to set the segment current to a lower peak value where desired. the user must also ensure that the peak current specifications of the leds connected to the driver are not exceeded. the effective value of c set includes not only the actual external capacitor used, but also the stray capacitance from osc to gnd. this capacitance is usually in the 1pf to 30pf range, depending on the layout used. applications information driving bicolor leds bicolor digits group a red and a green die together for each display element, so that the element can be lit red or green (or orange), depending on which die (or both) is lit. the max6955 allows each segment? current to be set individually from the 1/16th (minimum current and led intensity) to 15/16th (maximum current and led intensity), as well as off (zero current). thus, a bicolor (red-green) segment pair can be set to 256 color/intensity combinations.
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 20 www.maximintegrated.com choosing supply voltage to minimize power dissipation the max6955 drives a peak current of 40ma into leds with a 2.2v forward-voltage drop when operated from a supply voltage of at least 3.0v. the minimum voltage drop across the internal led drivers is therefore (3.0v - 2.2v) = 0.8v. if a higher supply voltage is used, the dri- ver absorbs a higher voltage, and the driver? power dissipation increases accordingly. however, if the leds used have a higher forward-voltage drop than 2.2v, the supply voltage must be raised accordingly to ensure that the driver always has at least 0.6v of headroom. the voltage drop across the drivers with a nominal 5v supply (5.0v - 2.2v) = 2.8v is nearly 3 times the drop across the drivers with a nominal 3.3v supply (3.3v - 2.2v) = 1.1v. in most systems, consumption is an important design criterion, and the max6955 should be operated from the system? 3.3v nominal supply. in other designs, the lowest supply voltage may be 5v. the issue now is to ensure the dissipation limit for the max6955 is not exceeded. this can be achieved by inserting a series resistor in the supply to the max6955, ensuring that the supply decoupling capacitors are still on the max6955 side of the resistor. for example, con- sider the requirement that the minimum supply voltage to a max6955 must be 3.0v, and the input supply range is 5v ?%. maximum supply current is 35ma + (40ma x 17) = 715ma. minimum input supply voltage is 4.75v. maximum series resistor value is (4.75v - 3.0v)/0.715a = 2.44 ? . we choose 2.2 ? ?%. worst- case resistor dissipation is at maximum toleranced resistance, i.e., (0.715a) 2 x (2.2 ? x 1.05) = 1.18w. the maximum max6955 supply voltage is at maximum input supply voltage and minimum toleranced resis- tance, i.e., 5.25v - (0.715a x 2.2 ? x 0.95) = 3.76v. low-voltage operation the max6955 works over the 2.7v to 5.5v supply range. the minimum useful supply voltage is deter- mined by the forward-voltage drop of the leds at the peak current i seg , plus the 0.8v headroom required by the driver output stages. the max6955 correctly regu- lates i seg with a supply voltage above this minimum voltage. if the supply drops below this minimum volt- age, the driver output stages can brown out, and be unable to regulate the current correctly. as the supply voltage drops further, the led segment drive current becomes effectively limited by the output driver's on- resistance, and the led drive current drops. the char- acteristics of each individual led in a display digit are well matched, so the result is that the display intensity dims uniformly as supply voltage drops out of regula- tion and beyond. computing power dissipation the upper limit for power dissipation (p d ) for the max6955 is determined from the following equation: p d = (v+ x 35ma) + (v+ - v led ) (duty x i seg x n) where: v+ = supply voltage duty = duty cycle set by intensity register n = number of segments driven (worst case is 17) v led = led forward voltage at i seg i seg = segment current set by r set p d = power dissipation, in mw if currents are in ma dissipation example: i seg = 30ma, n = 17, duty = 15/16, v led = 2.4v at 30ma, v+ = 3.6v p d = 3.6v (35ma) + (3.6v - 2.4v)(15/16 x 30ma x 17) = 0.700w thus, for a 36-pin ssop package (t ja = 1/0.0118 = +85?/w from operating ratings), the maximum allowed ambient temperature t a is given by: t j(max) = t a + (p d x t ja ) = +150? = t a + (0.700 x +85?/w) so t a = +90.5?. thus, the part can be operated safely at a maximum package temperature of +85?. power supplies the max6955 operates from a single 2.7v to 5.5v power supply. bypass the power supply to gnd with a 0.1? capacitor as close to the device as possible. add a 47? capacitor if the max6955 is not close to the board? input bulk decoupling capacitor.
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 21 www.maximintegrated.com x000 x010 x011 x100 x101 x110 x111 x001 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 msb lsb table 8. 16-segment display font map x000 x010 x011 x100 x101 x110 x111 x001 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 msb lsb table 9. 14-segment display font map
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 22 www.maximintegrated.com regi s ter data mode addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 14-segment or 16-segment mode, writing digit data to use font map data with decimal place unlit 0x20 to 0x2f 0x40 to 0x4f 0x60 to 0x6f 0 bits d6 to d0 select font characters 0 to 127 14-segment or 16-segment mode, writing digit data to use font map data with decimal place lit 0x20 to 0x2f 0x40 to 0x4f 0x60 to 0x6f 1 bits d6 to d0 select font characters 0 to 127 7-segment decode mode, dp unlit 0x20 to 0x2f 0x40 to 0x4f 0x60 to 0x6f 0 0 0 0 d3 to d0 7-segment decode mode, dp lit 0x20 to 0x2f 0x40 to 0x4f 0x60 to 0x6f 1 0 0 0 d3 to d0 7-segment no-decode mode 0x20 to 0x2f 0x40 to 0x4f 0x60 to 0x6f direct control of 8 segments table 10. digit plane data register format regi s ter data mode addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 segment line 0x20 to 0x2f 0x40 to 0x4f 0x60 to 0x6f dp a b c d e f g table 11. segment decoding for 7-segment displays
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 23 www.maximintegrated.com regi s ter data on s egment s = 1 7- s egment character d7* d6, d5, d4 d3 d2 d1 d0 dp* a b c d e f g 0 x 0 0 0 0 111111 0 1 x 0 0 0 1 011000 0 2 x 0 0 1 0 110110 1 3 x 0 0 1 1 111100 1 4 x 0 1 0 0 011001 1 5 x 0 1 0 1 101101 1 6 x 0 1 1 0 101111 1 7 x 0 1 1 1 111000 0 8 x 1 0 0 0 111111 1 9 x 1 0 0 1 111101 1 a x 1 0 1 0 111011 1 b x 1 0 1 1 001111 1 c x 1 1 0 0 100111 0 d x 1 1 0 1 011110 1 e x 1 1 1 0 100111 1 f x 1 1 1 1 100011 1 table 12. 7-segment segment mapping decoder for hexadecimal font regi s ter data digit-type regi s ter addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 output drive line cc7 cc6 cc5 cc4 cc3 cc2 cc1 cc0 slot identification 0x0c slot 4 slot 3 slot 2 slot 1 table 13. digit-type register * the decimal point is set by bit d7 = 1.
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 24 www.maximintegrated.com regi s ter data decode mode addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 hex code no decode for digit pairs 7 to 0. 0x01 00000000 0x00 hexadecimal decode for digit pair 0, no decode for digit pairs 7 to 1. 0x01 00000001 0x01 hexadecimal decode for digit pairs 2 to 0, no decode for digit pairs 7 to 3. 0x01 00000111 0x07 hexadecimal decode for digit pairs 7 to 0. 0x01 11111111 0xff table 15. decode-mode register examples regi s ter data digit-type regi s ter s etting addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 digits 7 to 0 are 16-segment or 7- segment digits. 0x0c 00000000 digit 0 is a 14-segment digit, digits 7 to 1 are 16-segment or 7- segment digits. 0x0c 00000001 digits 2 to 0 are 14-segment digits, digits 7 to 3 are 16- segment or 7-segment digits. 0x0c 00000111 digits 7 to 0 are 14-segment digits. 0x0c 11111111 table 14. example configurations for display digit combinations
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 25 www.maximintegrated.com regi s ter data regi s ter power-up condition addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 decode mode decode mode enabled 0x01 1 1 1 1 1 1 1 1 global intensity 1/16 (min on) 0x02 x xxx0000 scan limit display 8 digits: 0, 1, 2, 3, 4, 5, 6, 7 0x03 x x x x x 1 1 1 control register shutdown enabled, blink speed is slow, blink disabled 0x04 0 0 x x 0 0 0 0 gpio data outputs are low 0x05 x x x 0 0 0 0 0 port configuration no key scanning, p0 to p4 are all inputs 0x06 0 0 0 1 1 1 1 1 display test normal operation 0x07 x x x x xxx0 key_a mask none of the keys cause interrupt 0x08 0 0 0 0 0 0 0 0 key_b mask none of the keys cause interrupt 0x09 0 0 0 0 0 0 0 0 key_c mask none of the keys cause interrupt 0x0a 0 0 0 0 0 0 0 0 key_d mask none of the keys cause interrupt 0x0b 0 0 0 0 0 0 0 0 digit type all are 16 segment or 7 segment 0x0c 0 0 0 0 0 0 0 0 intensity10 1/16 (min on) 0x10 0 0 0 0 0 0 0 0 intensity32 1/16 (min on) 0x11 0 0 0 0 0 0 0 0 intensity54 1/16 (min on) 0x12 0 0 0 0 0 0 0 0 intensity76 1/16 (min on) 0x13 0 0 0 0 0 0 0 0 intensity10a 1/16 (min on) 0x14 0 0 0 0 0 0 0 0 intensity32a 1/16 (min on) 0x15 0 0 0 0 0 0 0 0 intensity54a 1/16 (min on) 0x16 0 0 0 0 0 0 0 0 intensity76a 1/16 (min on) 0x17 0 0 0 0 0 0 0 0 digit 0 blank digit, both planes 0x60 0 0 1 0 0 0 0 0 digit 1 blank digit, both planes 0x61 0 0 1 0 0 0 0 0 digit 2 blank digit, both planes 0x62 0 0 1 0 0 0 0 0 digit 3 blank digit, both planes 0x63 0 0 1 0 0 0 0 0 digit 4 blank digit, both planes 0x64 0 0 1 0 0 0 0 0 digit 5 blank digit, both planes 0x65 0 0 1 0 0 0 0 0 digit 6 blank digit, both planes 0x66 0 0 1 0 0 0 0 0 digit 7 blank digit, both planes 0x67 0 0 1 0 0 0 0 0 digit 0a blank digit, both planes 0x68 0 0 0 0 0 0 0 0 digit 1a blank digit, both planes 0x69 0 0 0 0 0 0 0 0 digit 2a blank digit, both planes 0x6a 0 0 0 0 0 0 0 0 digit 3a blank digit, both planes 0x6b 0 0 0 0 0 0 0 0 digit 4a blank digit, both planes 0x6c 0 0 0 0 0 0 0 0 digit 5a blank digit, both planes 0x6d 0 0 0 0 0 0 0 0 digit 6a blank digit, both planes 0x6e 0 0 0 0 0 0 0 0 digit 7a blank digit, both planes 0x6f 0 0 0 0 0 0 0 0 key_a debounced no key presses have been detected 0x08 0 0 0 0 0 0 0 0 key_b debounced no key presses have been detected 0x09 0 0 0 0 0 0 0 0 key_c debounced no key presses have been detected 0x0a 0 0 0 0 0 0 0 0 key_d debounced no key presses have been detected 0x0b 0 0 0 0 0 0 0 0 key_a pressed keys are not pressed 0x0c 0 0 0 0 0 0 0 0 key_b pressed keys are not pressed 0x0d 0 0 0 0 0 0 0 0 key_c pressed keys are not pressed 0x0e 0 0 0 0 0 0 0 0 key_d pressed keys are not pressed 0x0f 0 0 0 0 0 0 0 0 table 16. initial power-up register status
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 26 www.maximintegrated.com regi s ter data mode d7 d6 d5 d4 d3 d2 d1 d0 configuration register p i rtebxs table 17. configuration register format regi s ter data mode d7 d6 d5 d4 d3 d2 d1 d0 shutdown p i r t e b x 0 normal operation pirtebx1 table 18. shutdown control (s data bit do) format regi s ter data mode d7 d6 d5 d4 d3 d2 d1 d0 slow blinking. segments blink on for 1s, off for 1s with f osc = 4mhz. p i r t e 0 x s fast blinking. segments blink on for 0.5s, off for 0.5s with f osc = 4mhz. p i r t e 1 x s table 19. blink rate selection (b data bit d2) format regi s ter data mode d7 d6 d5 d4 d3 d2 d1 d0 blink function is disabled. p i r t 0 b x s blink function is enabled. p i r t 1 b x s table 20. global blink enable/disable (e data bit d3) format s egment s bit s etting in plane p1 s egment s bit s etting in plane p0 s egment behavior 0 0 segment off. 01 segment on only during the 1st half of each blink period. 10 segment on only during the 2nd half of each blink period. 1 1 segment on. table 21. digit register mapping with blink globally enabled regi s ter data mode d7 d6 d5 d4 d3 d2 d1 d0 blink timing counters are unaffected. p i r 0 e b x s blink timing counters are reset during the i 2 c acknowledge. p i r 1 e b x s table 22. global blink timing synchronization (t data bit d4) format regi s ter data mode d7 d6 d5 d4 d3 d2 d1 d0 digit data for both planes p0 and p1 are unaffected. p i 0 t e b x s d i g i t d ata for b oth p l anes p 0 and p 1 ar e cl ear ed d ur i ng the i 2 c acknow l ed g e.p i 1tebxs table 23. global clear digit data (r data bit d5) format
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 27 www.maximintegrated.com regi s ter data mode d7 d6 d5 d4 d3 d2 d1 d0 intensity for all digits is controlled by one setting in the global intensity register. p 0 r t e b x s intensity for digits is controlled by the individual settings in the intensity10 and intensity76 registers. p1rtebxs table 24. global intensity (i data bit d6) format regi s ter data mode d7 d6 d5 d4 d3 d2 d1 d0 p1 blink phase 0 i r t e b x s p0 blink phase 1 i r t e b x s table 25. blink phase readback (p data bit d7) format regi s ter data s can limit addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 hex code display digit 0 only 0x03 x x x x x 0 0 0 0x00 display digits 0 and 1 0x03 x x x x x 0 0 1 0x01 display digits 0 1 2 0x03 x x x x x 0 1 0 0x02 display digits 0 1 2 3 0x03 x x x x x 0 1 1 0x03 display digits 0 1 2 3 4 0x03 x x x x x 1 0 0 0x04 display digits 0 1 2 3 4 5 0x03 x x x x x 1 0 1 0x05 display digits 0 1 2 3 4 5 6 0x03 x x x x x 1 1 0 0x06 display digits 0 1 2 3 4 5 6 7 0x03 x x x x x 1 1 1 0x07 table 26. scan-limit register format regi s ter data duty cycle typical s egment current (ma) addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 hex code 1/16 (min on) 2.5 0x02 x x x x 0 0 0 0 0xx0 2/16 5 0x02 x x x x 0 0 0 1 0xx1 3/16 7.5 0x02 x x x x 0 0 1 0 0xx2 4/16 10 0x02 x x x x 0 0 1 1 0xx3 5/16 12.5 0x02 x x x x 0 1 0 0 0xx4 6/16 15 0x02 x x x x 0 1 0 1 0xx5 7/16 17.5 0x02 x x x x 0 1 1 0 0xx6 8/16 20 0x02 x x x x 0 1 1 1 0xx7 9/16 22.5 0x02 x x x x 1 0 0 0 0xx8 10/16 25 0x02 x x x x 1 0 0 1 0xx9 11/16 27.5 0x02 x x x x 1 0 1 0 0xxa 12/16 30 0x02 x x x x 1 0 1 1 0xxb 13/16 32.5 0x02 x x x x 1 1 0 0 0xxc 14/16 35 0x02 x x x x 1 1 0 1 0xxd 15/16 37.5 0x02 x x x x 1 1 1 0 0xxe 15/16 (max on) 37.5 0x02 x x x x 1 1 1 1 0xxf table 27. global intensity register format
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 28 www.maximintegrated.com regi s ter data regi s ter function addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 intensity10 register 0x10 digit 1 digit 0 intensity32 register 0x11 digit 3 digit 2 intensity54 register 0x12 digit 5 digit 4 intensity76 register 0x13 digit 7 digit 6 intensity10a register 0x14 digit 1a (7 segment only) digit 0a (7 segment only) intensity32a register 0x15 digit 3a (7 segment only) digit 2a (7 segment only) intensity54a register 0x16 digit 5a (7 segment only) digit 4a (7 segment only) intensity76a register 0x17 digit 7a (7 segment only) digit 6a (7 segment only) table 28. individual segment intensity registers regi s ter data duty cycle typical s egment current (ma) addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 hex code 1/16 (min on) 2.5 0x10 to 0x17 0000 0xx0 2/16 5 0x10 to 0x17 0001 0xx1 3/16 7.5 0x10 to 0x17 0010 0xx2 4/16 10 0x10 to 0x17 0011 0xx3 5/16 12.5 0x10 to 0x17 0100 0xx4 6/16 15 0x10 to 0x17 0101 0xx5 7/16 17.5 0x10 to 0x17 0110 0xx6 8/16 20 0x10 to 0x17 0111 0xx7 9/16 22.5 0x10 to 0x17 1000 0xx8 10/16 25 0x10 to 0x17 1001 0xx9 11/16 27.5 0x10 to 0x17 1010 0xxa 12/16 30 0x10 to 0x17 1011 0xxb 13/16 32.5 0x10 to 0x17 1100 0xxc 14/16 35 0x10 to 0x17 1101 0xxd 15/16 37.5 0x10 to 0x17 1110 0xxe 15/16 (max on) 37.5 0x10 to 0x17 see table 30. 1111 0xxf table 29. even individual segment intensity format
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 29 www.maximintegrated.com regi s ter data duty cycle typical s egment c u r r en t ( m a ) addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 hex code 1/16 (min on) 2.5 0x10 to 0x17 0 0 0 0 0x0x 2/16 5 0x10 to 0x17 0 0 0 1 0x1x 3/16 7.5 0x10 to 0x17 0 0 1 0 0x2x 4/16 10 0x10 to 0x17 0 0 1 1 0x3x 5/16 12.5 0x10 to 0x17 0 1 0 0 0x4x 6/16 15 0x10 to 0x17 0 1 0 1 0x5x 7/16 17.5 0x10 to 0x17 0 1 1 0 0x6x 8/16 20 0x10 to 0x17 0 1 1 1 0x7x 9/16 22.5 0x10 to 0x17 1 0 0 0 0x8x 10/16 25 0x10 to 0x17 1 0 0 1 0x9x 11/16 27.5 0x10 to 0x17 1 0 1 0 0xax 12/16 30 0x10 to 0x17 1 0 1 1 0xbx 13/16 32.5 0x10 to 0x17 1 1 0 0 0xcx 14/16 35 0x10 to 0x17 1 1 0 1 0xdx 15/16 37.5 0x10 to 0x17 1 1 1 0 0xex 15/16 (max on) 37.5 0x10 to 0x17 1 1 1 1 see table 29 0xfx table 30. odd individual segment intensity format regi s ter data mode addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 write gpio data 0x05 x x x p4 p3 p2 p1 p0 read gpio data 0x05 0 0 0 p4 or irq status p3 p2 p1 p0 table 31. gpio data register key s s canned port s available p0 p1 p2 p3 p4 none 5 pins gpio gpio gpio gpio gpio 1 to 8 3 pins key_a gpio gpio gpio irq 9 to 16 2 pins key_a key_b gpio gpio irq 17 to 24 1 pin key_a key_b key_c gpio irq 25 to 36 none key_a key_b key_c key_d irq table 32. port scanning function allocation
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 30 www.maximintegrated.com regi s ter data mode addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 gpio configuration register 0x06 set number of keys scanned set port direction for ports p0 to p4: 0 = output, 1 = input port allocation option s 0 keys scanned 0x06 0 0 0 p4 p3 p2 p1 p0 8 keys scanned 0x06 0 0 1 irq p3 p2 p1 key_a 16 keys scanned 0x06 0 1 0 irq p3 p2 key_b key_a 24 keys scanned 0x06 0 1 1 irq p3 key_c key_b key_a 32 keys scanned 0x06 1 x x irq key_d key_c key_b key_a example port configuration s etting s no keys scanned, p4 and p2 are outputs, others are inputs 0x06 00001011 8 keys scanned, p3 and p1 are outputs, p2 is an input 0x06 0 1 0 x 0 1 0 x 32 keys scanned, no gpio ports 0x06 1 xxxxxxx table 33. port configuration register format regi s ter data with appropriate s witch named below key ma s k regi s ter addre ss code (hex d7 d6 d5 d4 d3 d2 d1 d0 key_a mask register 0x08 sw_a7 sw_a6 sw_a5 sw_a4 sw_a3 sw_a2 sw_a1 sw_a0 key_b mask register 0x09 sw_b7 sw_b6 sw_b5 sw_b4 sw_b3 sw_b2 sw_b1 sw_b0 key_c mask register 0x0a sw_c7 sw_c6 sw_c5 sw_c4 sw_c3 sw_c2 sw_c1 sw_c0 key_d mask register 0x0b sw_ d7 sw_d6 sw_d5 sw_d4 sw_d3 sw_d2 sw_d1 sw_d0 table 34. key mask register format (write only)
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 31 www.maximintegrated.com regi s ter data key debounced regi s ter addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 key_a debounced register 0x08 sw_a7 sw_a6 sw_a5 sw_a4 sw_a3 sw_a2 sw_a1 sw_a0 key_b debounced register 0x09 sw_b7 sw_b6 sw_b5 sw_b4 sw_b3 sw_b2 sw_b1 sw_b0 key_c debounced register 0x0a sw_c7 sw_c6 sw_c5 sw_c4 sw_c3 sw_c2 sw_c1 sw_c0 key_d debounced register 0x0b sw_d7 sw_d6 sw_d5 sw_d4 sw_d3 sw_d2 sw_d1 sw_d0 table 35. key debounced register format (read only) regi s ter data key pre ss ed regi s ter addre ss code (hex d7 d6 d5 d4 d3 d2 d1 d0 key_a pressed register 0x0c sw_a7 sw_a6 sw_a5 sw_a4 sw_a3 sw_a2 sw_a1 sw_a0 key_b pressed register 0x0d sw_b7 sw_b6 sw_b5 sw_b4 sw_b3 sw_b2 sw_b1 sw_b0 key_c pressed register 0x0e sw_c7 sw_c6 sw_c5 sw_c4 sw_c3 sw_c2 sw_c1 sw_c0 key_d pressed register 0x0f sw_d7 sw_d6 sw_d5 sw_d4 sw_d3 sw_d2 sw_d1 sw_d0 table 36. key pressed register format (read only) regi s ter data mode addre ss code (hex) d7 d6 d5 d4 d3 d2 d1 d0 normal operation 0x07 x xxxxxx 0 display test 0x07 x xxxxxx 1 table 37. display test register
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 32 www.maximintegrated.com c o n f i g u r a t io n c h o ic e c o m m o n - c a t h o d e d r i v e : d i g it ty p e cc0: 16-seg monocolor cc1: 16-seg monocolor cc0 and cc1: (2) 7-seg bicolor or (4) 7-seg monocolor or (1) 7-seg bicolor and (2) 7-seg monocolor* cc0 and cc1: (1)16-seg bicolor cc0: 16-seg monocolor cc0: (2) 7-seg monocolor* or 7-seg bicolor cc1: 14-seg monocolor cc0: 14-seg monocolor cc1: 16-seg monocolor cc1: (2) 7-seg monocolor* or 7-seg bicolor cc0 and cc1: (2) 14-seg monocolor or 14-seg bicolor 00 cc0 cc0 cc0 cc0 cc0 cc0 cc0 01 cc1 cc1 cc1 cc1 cc1 cc1 cc1 02 a1 a1 1a a1 a1 1a a a a1 1a a 03 a2 a2 a2 a2 a2 04 bb 1b bb1bbbb1b b 05 cc 1c cc1cccc1c c 06 d1 d1 1d d1 d1 1d d d d1 1d d 07 d2 d2 1dp d2 d2 1dp d2 1dp 08 ee 1e ee1eeee1e e 09 ff 1f ff1ffff1f f 010 g1 g1 1g g1 g1 1g g1 g1 g1 1g g1 011 g2 g2 2a g2 g2 2a g2 g2 g2 2a g2 012 hh 2b hh2bhhh2b h 013 ii 2c ii2ciii2c i 014 jj 2d jj2djjj2d k 015 kk 2e kk2ekkk2e l 016 ll 2f ll2flll2f l 017 mm 2g mm2gmmm2g m 018 dp dp 2dp dp dp 2dp dp dp dp 2dp dp addre ss code (hex) 0x0c d7 d6 see table 41. d5 d4 see table 40. d3 d2 see table 39. d1 0101 regi s ter data d0 0 0 1 1 table 38. slot 1 configuration * 7-segment digits can be replaced by directly controlled discrete leds according to settings in decode mode register (table 11). ** the highlighted row is used in typical operating circuit 1 for display digits 0 and 1.
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 33 www.maximintegrated.com * 7-segment digits can be replaced by directly controlled discrete leds according to settings in decode mode register (table 11). ** the highlighted row is used in typical operating circuit 1 for display digits 2 and 3. c o n f i g u r a t io n c h o ic e c o m m o n - c a t h o d e d r i v e : d i g it ty p e cc2: 16-seg monocolor cc3: 16-seg monocolor cc2 and cc3: (2) 7-seg bicolor or (4) 7-seg monocolor or (1) 7-seg bicolor and (2) 7-seg monocolor* cc2 and cc3: (1)16-seg bicolor cc2: 16-seg monocolor cc2: (2) 7-seg monocolor* or 7-seg bicolor cc3: 14-seg monocolor cc2: 14-seg monocolor cc3: 16-seg monocolor cc3: (2) 7-seg monocolor* or 7-seg bicolor cc2 and cc3: (2) 14-seg monocolor or 14-seg bicolor 00 a1 a1 1a a1 a1 1a a a a1 1a a 01 a2 a2 a2 a2 a2 02 cc2 cc2 cc2 cc2 cc2 cc2 cc2 03 cc3 cc3 cc3 cc3 cc3 cc3 cc3 04 b b 1b b b 1b b b b 1b b 05 c c 1c c c 1c c c c 1c c 06 d1 d1 1d d1 d1 1d d d d1 1d d 07 d2 d2 1dp d2 d2 1dp d2 1dp 08 e e 1e e e 1e e e e 1e e 09 f f 1f f f 1f f f f 1f f 010 g1 g1 1g g1 g1 1g g1 g1 g1 1g g1 011 g2 g2 2a g2 g2 2a g2 g2 g2 2a g2 012 h h 2b h h 2b h h h 2b h 013 i i 2c i i 2c i i i 2c i 014 j j 2d j j 2d j j j 2d k 015 k k 2e k k 2e k k k 2e l 016 l l 2f l l 2f l l l 2f l 017 m m 2g m m 2g m m m 2g m 018 dp dp 2dp dp dp 2dp dp dp dp 2dp dp addre ss code (hex) 0x0c d7 d6 see table 41. d5 d4 see table 40. d3 0101 d2 0 0 1 1 d1 regi s ter data d0 see table 38. table 39. slot 2 configuration
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 34 www.maximintegrated.com c o n f i g u r a t io n c h o ic e c o m m o n - c a t h o d e d r i v e : d i g it ty p e cc4: 16-seg monocolor cc5: 16-seg monocolor cc4 and cc5: (2) 7-seg bicolor or (4) 7-seg monocolor or (1) 7-seg bicolor and (2) 7-seg monocolor* cc4 and cc5: (1)16-seg bicolor cc4: 16-seg monocolor cc4: (2) 7-seg monocolor* or 7-seg bicolor cc5: 14-seg monocolor cc4: 14-seg monocolor cc5: 16-seg monocolor cc5: (2) 7-seg monocolor* or 7-seg bicolor cc4 and cc5: (2) 14-seg monocolor or 14-seg bicolor 00 a1 a1 1a a1 a1 1a a a a1 1a a 01 a2 a2 ?2a2a2 02 b b 1b b b 1b b b b 1b b 03 c c 1c c c 1c c c c 1c c 04 cc4 cc4 cc4 cc4 cc4 cc4 cc4 05 cc5 cc5 cc5 cc5 cc5 cc5 cc5 06 d1 d1 1d d1 d1 1d d d d1 1d d 07 d2 d2 1dp d2 d2 1dp d2 1dp 08 e e 1e e e 1e e e e 1e e 09 f f 1f f f 1f f f f 1f f 010 g1 g1 1g g1 g1 1g g1 g1 g1 1g g1 011 g2 g2 2a g2 g2 2a g2 g2 g2 2a g2 012 h h 2b h h 2b h h h 2b h 013 i i 2c i i 2c i i i 2c i 014 j j 2d j j 2d j j j 2d k 015 k k 2e k k 2e k k k 2e l 016 l l 2f l l 2f l l l 2f l 017 m m 2g m m 2g m m m 2g m 018 dp dp 2dp dp dp 2dp dp dp dp 2dp dp addre ss code (hex) 0x0c d7 d6 see table 41. d5 0101 d4 0 0 1 1 d3 d2 see table 39. d1 regi s ter data d0 see table 38. table 40. slot 3 configuration * 7-segment digits can be replaced by directly controlled discrete leds according to settings in decode mode register (table 11). ** the highlighted row is used in typical operating circuit 1 for display digits 4 and 5.
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 35 www.maximintegrated.com * 7-segment digits can be replaced by directly controlled discrete leds according to settings in the decode mode register (table 11). ** the highlighted row is used in typical operating circuit 1 for display digits 6 and 7. c o n f i g u r a t io n c h o ic e c o m m o n - c a t h o d e d r i v e : d i g it ty p e cc6: 16-seg monocolor cc7: 16-seg monocolor cc6 and cc7: (2) 7-seg bicolor or (4) 7-seg monocolor or (1) 7-seg bicolor and (2) 7-seg monocolor* cc6 and cc7: (1)16-seg bicolor cc6: 16-seg monocolor cc6: (2) 7-seg monocolor* or 7-seg bicolor cc7: 14-seg monocolor cc6: 14-seg monocolor cc7: 16-seg monocolor cc7: (2) 7-seg monocolor* or 7-seg bicolor cc6 and cc7: (2) 14-seg monocolor or 14-seg bicolor 00 a1 a1 1a a1 a1 1a a a a1 1a a 01 a2 a2 a2 a2 a2 02 bb 1b bb1bbbb1b b 03 cc 1c cc1cccc1c c 04 d1 d1 1d d1 d1 1d d d d1 1d d 05 d2 d2 1dp d2 d2 1dp d2 1dp 06 cc6 cc6 cc6 cc6 cc6 cc6 cc6 07 cc7 cc7 cc7 cc7 cc7 cc7 cc7 08 ee 1e ee1eeee1e e 09 ff 1f ff1ffff1f f 010 g1 g1 1g g1 g1 1g g1 g1 g1 1g g1 011 g2 g2 2a g2 g2 2a g2 g2 g2 2a g2 012 hh 2b hh2bhhh2b h 013 ii 2c ii2ciii2c i 014 jj 2d jj2djjj2d k 015 kk 2e kk2ekkk2e l 016 ll 2f ll2flll2f l 017 mm 2g mm2gmmm2g m 018 dp dp 2dp dp dp 2dp dp dp dp 2dp dp addre ss code (hex) 0x0c d7 0101 d6 0 0 1 1 d5 d4 see table 40. d3 d2 see table 39. d1 regi s ter data d0 see table 38. table 41. slot 4 configuration
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 36 www.maximintegrated.com f a rcc dp g gcc b c e d digit 0b (red), digit 1b (green) 7-segment bicolor led o16 o17 o18 o0 o1 o11 o12 o13 o14 o0 o2 o3 o4 o15 f a h g2 g1 i b c e d digits 2 and 3 14-segment bicolor digit 6 4 x 4 matrix of discrete monocolor leds o8 o9 o10 o11 o12 o0 o4 o5 o6 m rcc dp ccc j l k o16 o17 o18 o2 o3 o13 o14 o15 f a cc1 dp g cc0 b c e d digits 0a and 1a 7-segment monocolor o9 o10 o7 o1 o0 o2 o4 o5 o6 o8 d2 a1 g1 f e g2 a2 b d1 c digit 5 16-segment monocolor o6 o7 o8 o9 o10 o0 o1 o2 o3 k m l dp h j i o14 o15 o16 o17 o18 cc o5 o11 o12 o13 d2 a1 g1 f e g2 a2 b d1 c digit 4 16-segment monocolor o6 o7 o8 o9 o10 o0 o1 o2 o3 k m l dp h j i o14 o15 o16 o17 o18 cc o4 o11 o12 o13 3.3v 100nf 47 f o0 o1 o2 o3 o4 o5 o6 o7 o8 o9 o10 o11 o12 o13 o14 o15 o16 o17 o18 p0 p1 p2 p3 p4/irq iset r set osc_out osc v+ v+ gnd gnd ad1 v+ gnd ad0 scl sda blink o5 o8 o9 o10 o11 o12 o13 o14 o15 o16 o17 o18 o6 c set o0 o2 o3 o4 digit 7 4 x 4 matrix of discrete monocolor leds o5 o8 o9 o10 o11 o12 o13 o14 o15 o16 o17 o18 o7 max6955 typical operating circuits
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 37 www.maximintegrated.com d2 a g1 f e g2 a2 b d1 c digit 0 o6 o7 o8 o9 o10 o2 o3 o4 o5 k m l dp h j i o14 o15 o16 o17 o18 cc o0 o11 o12 o13 d2 a g1 f e g2 a2 b d1 c digit 2 o6 o7 o8 o9 o10 o0 o1 o4 o5 k m l dp h j i o14 o15 o16 o17 o18 cc o2 o11 o12 o13 3.3v 100nf 47 f o0 o1 o2 o3 o4 o5 o6 o7 o8 o9 o10 o11 o12 o13 o14 o15 o16 o17 o18 p0 p1 p2 p3 p4/irq iset r set osc_out osc v+ v+ gnd gnd v+ gnd blink c set d2 a g1 f e g2 a2 b d1 c digit 1 o6 o7 o8 o9 o10 o2 o3 o4 o5 k m l dp h j i o14 o15 o16 o17 o18 cc o1 o11 o12 o13 d2 a g1 f e g2 a2 b d1 c digit 3 o6 o7 o8 o9 o10 o0 o1 o4 o5 k m l dp h j i o14 o15 o16 o17 o18 cc o3 o11 o12 o13 d2 a g1 f e g2 a2 b d1 c digit 6 o4 o5 o8 o9 o10 o0 o1 o2 o3 k m l dp h j i o14 o15 o16 o17 o18 cc o6 o11 o12 o13 d2 a g1 f e g2 a2 b d1 c digit 7 o4 o5 o8 o9 o10 o0 o1 o2 o3 k m l dp h j i o14 o15 o16 o17 o18 cc o7 o11 o12 o13 d2 a g1 f e g2 a2 b d1 c digit 4 o6 o6 o8 o9 o10 o0 o1 o2 o3 k m l dp h j i o14 o15 o16 o17 o18 cc o4 o11 o12 o13 d2 a g1 f e g2 a2 b d1 c digit 5 o6 o7 o8 o9 o10 o0 o1 o2 o3 k m l dp h j i o14 o15 o16 o17 o18 cc o5 o11 o12 o13 max6955 ad1 ad0 scl sda ad1 ad0 scl sda typical operating circuits (continued)
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 38 www.maximintegrated.com f a rcc dp g gcc b c e d digit 0b (red), digit 1b (green) 7-segment bicolor led o16 o17 o18 o0 o1 o11 o12 o13 o14 o0 o1 o2 o3 o15 f a h g2 g1 i b c e d digits 2 and 3 14-segment bicolor digit 6 4 x 4 matrix of discrete monocolor leds o8 o9 o10 o11 o12 o0 o4 o5 o6 m rcc dp ccc j l k o16 o17 o18 o2 o3 o13 o14 o15 f a cc1 dp g cc0 b c e d digits 0a and 1a 7-segment monocolor o9 o10 o7 o1 o0 o2 o4 o5 o6 o8 d2 a1 g1 f e g2 a2 b d1 c digit 5 16-segment monocolor o6 o7 o8 o9 o10 o0 o1 o2 o3 k m l dp h j i o14 o15 o16 o17 o18 cc o5 o11 o12 o13 d2 a1 g1 f e g2 a2 b d1 c digit 4 16-segment monocolor o6 o7 o8 o9 o10 o0 o1 o2 o3 k m l dp h j i o14 o15 o16 o17 o18 cc o4 o11 o12 o13 3.3v 100nf 47 f o0 o1 o2 o3 o4 o5 o6 o7 o8 o9 o10 o11 o12 o13 o14 o15 o16 o17 o18 p0 p1 p2 p3 p4/irq iset r set osc_out osc v+ v+ gnd gnd ad1 v+ gnd ad0 scl sda blink o4 o5 o6 o7 o0 o1 o2 o3 o4 o5 o6 o7 p1 c set o0 o1 o2 o3 digit 7 4 x 4 matrix of discrete monocolor leds o4 o5 o6 o7 o0 o1 o2 o3 o4 o5 o6 o7 p3 max6955 sw00 sw01 sw02 sw03 sw04 sw05 sw06 sw07 sw10 sw11 sw12 sw13 sw14 sw15 sw16 sw17 p0 p2 sw20 sw21 sw22 sw23 sw24 sw25 sw26 sw27 sw30 sw31 sw32 sw33 sw34 sw35 sw36 sw37 typical operating circuits (continued)
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated | 39 www.maximintegrated.com top view ssop max6955 1 2 3 4 5 6 7 8 9 10 11 12 13 14 o7 o6 o5 o4 o3 o2 o1 o0 ad1 scl sda ad0 p1 p0 15 16 17 18 gnd iset gnd o8 36 35 34 33 32 31 30 29 28 27 26 25 24 23 p4/irq p3 p2 osc_out blink o18 o10 o17 o16 o15 o14 o13 o12 o11 22 21 20 19 v+ o9 osc v+ o18 o17 o15 o14 o11 o10 o9 ep* o13 o12 o16 o1 o2 o3 o4 o5 o6 o7 o8 o0 ad1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 gnd v+ osc v+ n.c. iset gnd gnd n.c. sda ad0 p1 p0 p4/irq p3 p2 osc_out blink scl tqfn-ep + max6955 v+ *ep = exposed pad. connect ep to gnd. pin configurations chip information process: cmos package information for the latest package outline information and land patterns (foot- prints), go to www.maximinte g rated.com/packa g e s . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 36 ssop a36-2 21-0040 90-0098 40 tqfn-ep t4066+5 21-0141 90-0055
max6955 2-wire interfaced, 2.7v to 5.5v led display driver with i/o expander and key scan maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integr ated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time . the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. 2015 maxim integrated products , inc. | 40 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds web site at www.maximintegrated.com. revision history revision number revision date description pages changed 0 initial release 1 2 12/06 3 3/08 corrected data sheet errors. 1, 2, 3, 6, 15, 16, 18, 19, 36, 37, 38 4 7/15 removed automotive reference from data sheet and updated benefits and features section 1

▲Up To Search▲

Price & Availability of MAX6955ATL

	To Download MAX6955ATL Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .